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Hot Swap Controller and Digital Power and
Energy Monitoring with PMBus Interface
Data Sheet
FEATURES
ADM1276
FUNCTIONAL BLOCK DIAGRAM
–
Controls supply voltages from 2 V to 20 V
370 ns response time to short circuit
Resistor-programmable 5 mV to 25 mV current limit
±1% accurate, 12-bit ADC for current, V IN /V OUT readback
Charge pumped gate drive for multiple external N-channel FETs
VCC
VCAP
ENABLE
UV
SENSE+
LDO
+
1.0V
SENSE–
+ – ADM1276-3
×50
CHARGE
PUMP
IOUT
V CP
GATE
DRIVE/
LOGIC
GATE
High gate drive voltage to ensure lowest R DSON
Foldback for tighter FET SOA protection
Automatic retry or latch-off on current fault
Programmable current-limit timer for SOA
Programmable, multifunction GPO
OV
ISET
SS
1.0V
REF
SELECT
1.0V
TIMER ON
+
–
CURRENT
LIMIT
CONTROL
TIMEOUT
CURRENT
LIMIT
VOUT
Power-good status output
Analog UV and OV protection
TIMER
TIMER
TIMEOUT
FLB
PWRGD
ENABLE pin
Reports power and energy consumption over time
Peak detect registers for current and voltage
SENSE+
VOUT
IOUT
12-BIT
ADC
LOGIC
AND
PMBus
GPO2/ALERT2
LATCH
SCL
SDA
ADR
PMBus fast mode compliant interface
20-lead LFCSP
APPLICATIONS
Power monitoring and control/power budgeting
Central office equipment
Telecommunication and data communication equipment
PCs/servers
GENERAL DESCRIPTION
The ADM1276 is a hot swap controller that allows a circuit board
to be removed from or inserted into a live backplane. It also features
current and voltage readback via an integrated 12-bit analog-to-
digital converter (ADC), accessed using a PMBus? interface.
The load current is measured using an internal current sense
amplifier that measures the voltage across a sense resistor in
the power path via the SENSE+ and SENSE? pins. A default
limit of 20 mV is set, but this limit can be adjusted, if required,
using a resistor divider network from the internal reference
voltage to the ISET pin.
The ADM1276 limits the current through the sense resistor by
controlling the gate voltage of an external N-channel FET in the
power path, via the GATE pin. The sense voltage—and, therefore,
the load current—is maintained below the preset maximum. The
ADM1276 protects the external FET by limiting the time that the
FET remains on while the current is at its maximum value. This
current-limit time is set by the choice of capacitor connected to
the TIMER pin. In addition, a foldback resistor network can be
used to actively lower the current limit as the voltage across the
FET is increased. This helps to maintain constant power in the
Rev. C Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
GND
Figure 1.
FET and allows the safe operating area (SOA) to be adhered to
in an effective manner.
In case of a short-circuit event, a fast internal overcurrent
detector responds within 370 ns and signals the gate to shut
down. A 1500 mA pull-down device ensures a fast FET response.
The ADM1276 features overvoltage (OV) and undervoltage (UV)
protection, programmed using external resistor dividers on the
UV and OV pins. A PWRGD signal can be used to detect when
the output supply is valid, using the FLB pin to monitor the output.
A GPO pin can be configured as an output signal that can be
asserted when a programmed current or voltage level is reached.
The 12-bit ADC can measure the current in the sense resistor,
as well as the supply voltage on the SENSE+ pin or the output
voltage. A PMBus interface allows a controller to read current
and voltage data from the ADC. Measurements can be initiated
by a PMBus command. Alternatively, the ADC can run conti-
nuously, and the user can read the latest conversion data whenever
required. As many as four unique PMBus addresses can be selected,
depending on the way that the ADR pin is connected.
The ADM1276 is available in a 20-lead LFCSP with a LATCH pin
that can be configured for automatic retry or latch-off when an
overcurrent fault occurs.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ?2011–2013 Analog Devices, Inc. All rights reserved.
Technical Support www.analog.com
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